The Avexir Low Profile DDR2-533/667/800 Unbuffered and SO DIMM is designed to meet the 533/667/800MHz data-rate specification of the JEDEC (Joint Electron Device Engineering Council) standard. The Avexir Low Profile Solution is specially designed for mechanism application. And achieves in each application and craft union most meets the customer demand Also can solve the space and design needs. Also, these modules are available in single and dual channel configurations.

• Density : 512MB / 1GB / 2GB
• Package: 240-pin dual in line memory module (U-DIMM)(Low Profile)
• Package: 200-pin small outline dual in line memory module (SO-DIMM)(Low Profile)
• Power supply: VDD = 1.8V +/- 0.1V
• Frequency: 533 / 667 / 800Mhz
• Interface: SSTL_18
• Burst lengths (BL): 4, 8
• /CAS Latency (CL): 3, 4, 5, 6
• Precharge: auto precharge option for each burst access
• Refresh: auto-refresh, self-refresh
• Refresh cycles: 8192 cycles/64ms
  -Average refresh period
  7.8 µs at 0'C <= TC <= +85'C
  3.9 µs at +85'C < TC <= +95'C
• Double-data-rate architecture; two data transfers per clock cycle
• The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture
•  Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver
• DQS is edge-aligned with data for READs; centeraligned with data for WRITEs
• Differential clock inputs (CK and /CK)
• DLL aligns DQ and DQS transitions with CK transitions
• Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS
• Data mask (DM) for write data
• Posted /CAS by programmable additive latency for better command and data bus efficiency
• Off-Chip-Driver Impedance Adjustment and On-Die-Termination for better signal quality
• /DQS can be disabled for single-ended Data Strobe operation
• Serial presence detect with EEPROM
• All of Lead-free products are compliant for RoHS