Embedded Solution - DDR
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Description
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The Avexir Double Data Rate(DDR) SDRAMs are high quality and high performance. Read and write operations are performed
at the cross points of the CK and the /CK. This high-speed data transfer is
realized by the 2 bits prefetch-pipelined
architecture. Data strobe (DQS) both for read and write are available for high
speed and reliable data bus design. By setting extended mode register, the
on-chip Delay Locked Loop (DLL) can be set enable or disable.
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Specifications / Features
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- Density : 128MB / 256MB / 512MB / 1GB
- Package: JEDEC Standard 184-pin dual in-line memory module (U-DIMM)
- Package: JEDEC Standard 200-pin small outline dual in line memory module (SO-DIMM)
- Power supply: VDD = 2.5V(2.6V) +/- 0.1V
- SSTL_2 Interface
- Frequency: 266 / 333 / 400Mhz
- Programmable burst length (BL): 2, 4, 8
- Programmable /CAS latency (CL): 2.5 , 3
- Double-data-rate architecture; two data transfers per clock cycle
- Bidirectional data strobe [DQ] (x4,x8) & [L(U)DQS] (x16)
- Differential clock inputs (CK and /CK)
- DLL aligns DQ and DQS transition with CK transition
- Programmable Burst type (sequential & interleave)
- Edge aligned data output, center aligned data input
- Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
- 66pin TSOP II and 60 ball FBGA package
- Serial presence detect with EEPROM
- All of Lead-free products are compliant for RoHS
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Ordering Information
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Type |
Pin |
Capacity |
Speed |
Bandwidth |
Timing |
(Unbuffered) |
(Pin) |
(MB/GB) |
(MHz) |
(MB/s) |
CL-tRCD-tRP |
U-DIMM |
184 |
128MB~1GB |
DDR266 |
PC2100 |
2.5-3-3 |
U-DIMM |
184 |
128MB~1GB |
DDR333 |
PC2700 |
2.5-3-3 |
U-DIMM |
184 |
128MB~1GB |
DDR400 |
PC3200 |
3-3-3 |
SO-DIMM |
200 |
128MB~1GB |
DDR266 |
PC2100 |
2.5-3-3 |
SO-DIMM |
200 |
128MB~1GB |
DDR333 |
PC2700 |
2.5-3-3 |
SO-DIMM |
200 |
128MB~1GB |
DDR400 |
PC3200 |
3-3-3 |
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* All DDR memory modules above are available in single and dual channel
configurations
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